Noasic

16/10/2017

Our very own airhdl was just covered in the Xilinx Xcell Daily Blog

The free, Web-based airhdl register file generator from noasic GmbH, an FPGA design and coaching consultancy and EDA tool developer, uses a simple, online definition tool to create register definitions from which the tool then automatically generates HDL, a C header file, and HTML documentation. T.....

03/10/2017

https://youtu.be/gxE9EJ0AaR8

This video shows how easy it is to create an AXI-4 register file using airhdl, and to integrate it into an Amazon F1 Custom Logic (CL) module.

21/07/2016

noasic CEO Guy Eschemann talking about airhdl at FPGA Kongress 2016

19/05/2016

airhdl now has a logo!

12/05/2016

AirHDL-generated C headers now include bit-mask macros for every register field

22/03/2015

This project involves porting a GEMAC core to MyHDL. The GEMAC is typically used to stream data in and out of an FPGA versus the lower throughput in common IO Ethernet connections.

17/03/2015

The International Conference on Field-programmable Logic and Applications (FPL) was the first and remains the largest conference covering the rapidly growing area of field-programmable logic. During the past 24 years, many of the advances achieved in reconfigurable system architectures, applications…

19/02/2015

Our CAN Controller IP Core is free for academic use http://noasic.com/can-controller-ip-core/

CAN Controller IP Core The noasic™ CAN Controller Core implements both medium access (MAC) and physical layer functions of the CAN bus protocol such as data encapsulation/decapsulation, frame coding (stuffing/destuffing), medium access management, error detection, error signaling, acknowledgment, se…

16/12/2014

AirHDL lets you manage your ZYNQ and MicroBlaze register maps online. Try it now free at http://airhdl.com

AirHDL is provided by noasic GmbH. For information, please contact [email protected]. All trademarks are property of their respective owners.

05/09/2014

http://noasic.com/blog/something-something-hls/

Something, Something HLS Posted on September 5, 2014 by Guy Eschemann While many developers I know are still skeptical about HLS, I have used Xilinx Vivado HLS with great success on a few occasions during the last months. When applied to the right problem, HLS is a fantastic productivity booster for…

11/06/2014

22/05/2014

http://www.slideshare.net/GuyEschemann/2014-all-programmabe-days-fpga-design-with-python

21.05.2014 1 FPGA Design with Python and MyHDL Guy Eschemann