Expedera Inc

05/15/2026

Expedera's Athish Rahul Rao argues that the core hardware question is no longer how many TOPS can fit within a given power and area budget. It is whether an architecture is built around real multimodal workload behavior, especially memory movement, activation lifetimes, utilization under irregular graphs, and the software needed to schedule all of it effectively.

Peak TOPS is becoming a weaker proxy for delivered edge performance.

05/07/2026

Let’s define why agentic AI is different from generative AI. First and foremost, there is a notion of autonomy. Generative AI is a prompt, and then you come up with a response. Agentic AI has more autonomy in high-level tasks. You’ve given them high-level tasks, and they are responsible for orchestrating, planning it out, and coming up with how to follow through.

Long‑running agents, tool-calling LLMs, and multimodal chaos are rewriting edge compute rules, and making chip design more challenging.

05/01/2026

"If you think you understand how agentic AI will be used at the edge, then you don’t understand agentic AI yet." Agentic AI is likely the next evolutionary step in edge inference. How it all plays out always comes back to three things: how much power it consumes, how much data movement it requires, and how much compute it needs. Expedera Chief Scientist, Sharad Chole, shares his perspective in this Semiconductor Engineering Roundtable.

As models evolve faster than silicon cycles, experts weigh how much adaptability architects can afford without sacrificing power, area, or efficiency.

04/10/2026

Expedera Chief Scientist, Sharad Chole, explains that Edge AI processing is not just a hardware architecture challenge. It starts with the models, with quantization, and with the application. This is a whole-stack problem. https://semiengineering.com/fast-isnt-fast-enough-redefining-metrics-for-edge-ai/

Why latency guarantees, memory movement, power budgets, and rapid model deployment now matter more than raw TOPS.

04/09/2026

Expedera's Chief Scientist, Sharad Chole, makes an interesting case that Edge intelligence is hampered not by a lack of compute but by the underutilization of available resources.

Edge intelligence is hampered not by a lack of compute, but by the waste of it.

04/03/2026

We have to come up with hardware architectures that exploit the network architecture itself. Edge devices are essentially bandwidth-limited. Training is done using multiple HBMs. But on the edge, there is literally one LPDDR, or not even 64 channels, maybe even a smaller-channel LPDDR that gets deployed on low-cost edge devices. That means bandwidth management becomes a critical part of how we execute things on edge inference. This white paper examines technical challenges, architectural innovations, and benchmarks to help OEMs successfully transition to edge-native AI. https://www.expedera.com/next-generation-ai-transitioning-inference-from-the-cloud-to-the-edge/

03/23/2026

Architecting solutions for edge AI is not about minimizing cloud solutions or making small extensions of existing MCUs/MPUs. It’s a hardware/software/model co-development problem.

Architecting solutions for edge AI is not about minimizing cloud solutions or making small extensions of existing MCUs/MPUs. It's a hardware/software/model co-development problem.

02/12/2026

How much of the energy consumed in an AI chip is spent doing something useful? This question affects everything from software to system architecture to chip design - this issue is explored in a SemiEngineering feature, with comments from Expedera's Chief Scientist and Co-founder, Sharad Chole

How much of the energy consumed in an AI chip is spent doing something useful? This question affects everything from software to system architecture to chip design.

02/05/2026

Edge Device Makers — Bring LLMs On-Device with Confidence. The shift from cloud inference to on-device LLM ex*****on brings better privacy, responsiveness, and cost savings — but it also introduces power and memory challenges. Origin Evolution for Edge tackles these head-on with hardware/software co-design, scalable performance up to 32 TFLOPS, and a comprehensive toolchain to deploy over 100 popular networks easily. It’s the perfect acceleration IP for the next wave of edge innovation. https://www.expedera.com/origin-evolution-for-edge/

02/03/2026

WHITE PAPER ALERT: "Future-Proofing System Design". This whitepaper explores how converging forces—AI-driven workloads, heterogeneous integration, and increasingly complex security requirements—are transforming design priorities. Adaptability, openness, and lifecycle management are no longer secondary considerations but core architectural imperatives. Standardization through initiatives such as UCIe and OCP fosters interoperability and scalability, while extensible hardware and digital twin methodologies ensure that systems remain flexible, verifiable, and continuously optimized. At the same time, Zero Trust principles and PUF-based authentication anchor security in silicon, ensuring integrity across decades of operation. Register and download with the link below:

https://ow.ly/XFVh50Y6ztP